On-Demand Technical Webinars

1-Hr Webinar

High-Level Design to Silicon Reality: How Rise + Precision Accelerate AI-Guided Exploration

Done in partnership with Precision Innovation – The primary industrial partner for the open-source OpenROAD tool flow

This webinar will demonstrate how Rise + Precision deliver the fast, accurate feedback required for AI-driven architectural exploration, and how you can incorporate these capabilities directly into your own design flow.  The webinar included technical presentation from subject experts and live demonstration of the AI-driven flow.

1-Hr Webinar

SystemVerilog at the Core: Scalable Verification and Debug in HLS

(With guest speaker, verification methodology specialist and architect, Mark Glasser)

In this webinar we will focus on how to do verification in a High-Level design flow.   Rise fully supports C++, SystemC and SystemVerilog for high-level design and in this webinar we will outline the methodology for all 3 languages but take a deeper dive into the flow using SystemVerilog showing how to mix RTL and HL languages automatically, re-use your testbench from HL->RTL including UVM and full debug.

1-Hr Webinar

Yes, HLS Can Be a Game Changer for Control Logic—Learn How to Make It Work for You

In this webinar, we will take a deep-dive on designing and verifying control logic using high-level design methodologies. We’ll show how Rise Design Automation’s multi-language, multi-abstraction toolchain—supporting C++, SystemC, and SystemVerilog—works in conjunction with generative AI to help engineers express, optimize, and verify control behavior without hand-coding state machines in RTL.

1-Hr Webinar

Accelerating Semiconductor Design with Generative AI

This is the on-demand version of the live webinar hosted by Rise and SemiWiki titled “Accelerating Semiconductor Design with Generative AI”.  It outlines how the combination of raising design abstraction, the Rise high-level toolchain and generative AI will help deliver orders-of-magnitude in productivity for complex hardware design.

1-Hr Webinar

From Concept to QoR: Practical Generative AI for ASIC Managers and Engineers

In this webinar, we explore the role of Generative AI and the unique solutions offered by Rise.ai, in conjunction with the Rise High-Level Design Tool Chain.  There is a combination of technical slides describing the solution and a live demonstration of the entire AI interface into the HLS toolchain

1-Hr Webinar

Rise Together Beyond RTL : Practical Techniques for Improving ASIC Design Efficiency and Early Verification

This is an On-Demand version of our first 1-hour webinar.  It contains a general introduction to Rise Design Automation and its tools, a technical introduction to how high-level design works and live product demonstrations for both Synthesis, initial verification, Rise.ai Advisor and Design Space Exploration.