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Verification has long been the bottleneck in hardware design. With High-Level Synthesis (HLS), many teams discover an unexpected benefit: verification can start earlier, run significantly faster, and make debug easier.
While raising abstraction dramatically improves productivity, most HLS flows begin in C++ or SystemC. Design teams are comfortable at RTL, and verification teams often rely on SystemVerilog/UVM. This disconnect can lead to duplicated effort, delayed bug discovery, and complex debug.
Rise Design Automation is unifying design and verification teams across language and abstraction boundaries. By fully supporting C++ and SystemC in existing HLS flows, and uniquely enabling native SystemVerilog with true mixed-language synthesis and verification, Rise delivers the benefits of high-level design while easing adoption and managing risk.
This webinar opens with a special introduction by Mark Glasser, verification architect and methodology expert. Mark will share his perspective and lessons learned on the value of raising abstraction for both verification and design. While Rise supports multiple verification methodologies and languages, the remainder of the session will focus on how SystemVerilog can be applied consistently from HLS through RTL — enabling reuse of UVM and familiar infrastructures, while simplifying debug through powerful automation and HL–RTL correlation.
In this deep-dive session, you’ll see how Rise DA helps you:
Whether you’re evaluating HLS or integrating it deeply into your flow, this webinar offers practical techniques to accelerate verification and debug.
Follow a walkthrough of a design example in the Rise DA flow. See how verification begins at the high level, carries through RTL, and maintains methodology reuse and debug continuity
Verification engineers, hardware designers, architects, and methodology leads who want to:
Mike Fingeroff, Chief of High-Level Synthesis (HLS) With over 20 years of experience in hardware design automation, Mike has specialized in High-Level Synthesis (HLS), focusing on machine learning and early performance modeling using SystemVerilog, SystemC, and MatchLib. He is the author of The High-Level Synthesis Blue Book, and his expertise includes C++, SystemC, and video and wireless algorithms.
Ellie Burns currently serves as the Head of Marketing at Rise Design Automation (RDA). With over 30 years of experience in the semiconductor and EDA industries, she has held diverse roles in engineering, applications engineering, technical marketing, product management, and senior leadership, specializing in driving business growth through strategic marketing. 
